Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Meaning of these terms in semiconductor field

Status
Not open for further replies.

vikram789

Member level 3
Joined
Aug 1, 2008
Messages
59
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,288
Activity points
1,671
Meaning of these terms

hi can anyone explain me what these tools are used for , i work in semiconductor company where i use them often for QA but dont know what these do..

espcv
Ccsn
Ccst
Ecsm
Vxl
Atpg ....have some idea
Timever
Funcver
Primetime
Celtic
 

primetime is the tool used for timing analysis in a database
celtic is used for noise (cross talk) analysis)

I dont know abt others
 

Here is some info on CAD Tools that are used in IC design.

==================================
Verilog Simulators
- VCS (Synopsys)
- NCVerilog (Cadence)

Synthesis
- DC - Design Compiler (Synopsys)
- RC - RTL compiler (Cadence)

gate level STA
- Primetime (Synopsys)

Transistor Level STA
- Nanotime (Synopsys)

Equivalency Checking
- Conformal LEC (Cadence) (thru Verplex Aquisition)
- Formality (Synopsys)

Equivalency Checking for SRAMs/Register Files (Memories)
- ESP-CV (Synopsys) (thru Innologic Aquisition)

ATPG (Automatic Test Pattern Generator)
- Fastscan (Mentor)
- Tetramax (Synopsys)
- Encounter Test (Cadence)


===========================================



some more CAD Tools ....

===========================================

Placement (P in P&R)
- IC compiler (Synopsys)

Routing (R in P&R)
- Astro , Zroute (Synopsys)
- Nanoroute (Cadence)

Physical Design Verification (PDV) ( LVS , DRC , ...)
- Calibre (Mentor)
- Assura (Cadence)

RC Extraction
- Star RC (Synopsys)
- Assura (Cadence)

Schematic Entry/Layout Design (Custom Tools)
- Virtuoso Schematic entry , Layout XL/VXL (Cadence)

Spice
- Hspice (Synopsys)
- Spectre (Cadence)
- Smartspice (Silvaco/Simucad)

Fast Spice
- Nanosim (Synopsys)
- Ultrasim (Cadence)

Power Estimation
- PrimePower (Synopsys)
- Powermeter (Cadence)

Library Characterization
- Signal Storm (Cadence)
- Liberty NCX (Synopsys)

EM/IR
- Voltagestorm (IR) , Electronstorm(EM) (Cadence)
- PrimeRail (Synopsys)
- Redhawk (Apache)

Property checking FV tools
- Magellan (Synopsys)
- Oin (Mentor)
- JasperGold (Jasper)

Test Compression
- TestKompress (Mentor)
- DFTMax compression (Synopsys)
- Encounter Testcompression (Cadence)

FPGA tools
- synplicity Tools (aquired by Synopsys)

PCB tools
- Allegro (Cadence)

IP portfolio
- Designware (Synopsys)
- Openchoice (Cadence)


===========================================
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top