nguyendinhthuc
Newbie level 3
Hi all
I am a newer in skill language. I have a new problem. I have been written a code to create a pcell resistor by skill language. The properties of the pcell resistor in schematic and layout are the same. But when I run the LVS check, the mismatch is happened. A reason is that I have changed a function ( the function to calculate resistor value). I changed it in the cdf parameter file, the spice library (to run simulation). I do not know that I must change an other file to pass the LVS check. Have you any ideal for this problem ?
I am a newer in skill language. I have a new problem. I have been written a code to create a pcell resistor by skill language. The properties of the pcell resistor in schematic and layout are the same. But when I run the LVS check, the mismatch is happened. A reason is that I have changed a function ( the function to calculate resistor value). I changed it in the cdf parameter file, the spice library (to run simulation). I do not know that I must change an other file to pass the LVS check. Have you any ideal for this problem ?