fly_fish
Junior Member level 3
LNA 's gain
I have designed a LNA circuit in RFIC with charted RF CMOS 0.18um process.
The LNA's measured current and bias voltage agree with its simulated ones.
Also, the LNA's input and output port have been matched well with VSWR<2 at 1.55GHz.
However, the LNA's gain at 1.55GHz is only 5dB, far lower than the simulated vaule-15dB.
Anyone can tell me why? Thanks!
I have designed a LNA circuit in RFIC with charted RF CMOS 0.18um process.
The LNA's measured current and bias voltage agree with its simulated ones.
Also, the LNA's input and output port have been matched well with VSWR<2 at 1.55GHz.
However, the LNA's gain at 1.55GHz is only 5dB, far lower than the simulated vaule-15dB.
Anyone can tell me why? Thanks!