windy7286
Newbie level 3
when i use DC, i found there was a warning in the below module.
dc_shell> check_design
Warning: In design 'counter11', cell 'C58' does not drive any nets. (LINT-1)
1
I cannot find the mistake in the module.
Who can get me a hand?
many thanks
Code Verilog - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 module counter11 ( output logic [3:0] count, input logic nreset, nready, clk); always_ff @ ( posedge clk, negedge nreset) if (~nreset) count <= 0; else if (count < 11 && ~nready) count <= count + 1; else if (~nready) count <= 0; endmodule
dc_shell> check_design
Warning: In design 'counter11', cell 'C58' does not drive any nets. (LINT-1)
1
I cannot find the mistake in the module.
Who can get me a hand?
many thanks
Last edited by a moderator: