Std Cell vs Macros vs Any logic cells(buffer, inverter etc)

[Cya]

As I'm new to vlsi design I want to know how to differentiate between std cells and macros and other logic cells(inverter or buffer etc.).
As far as I know Std cells are predefined cells that are used to implement boolean logic and macros are not predefined. But in a design we use standard cells along with inverters and other logic gates. Then aren't the inverters also std cells?

Please clarify.
Thanks

 

[dick_freebird]

No.

Standard cells are laid out such that they butt clean, have
common pin coordinates on a coarse grid, use uniform
power rails and so on.

Macro is just an assembly of objects. Sometimes I just
build an inverter from transistors if they're uniquely
sized (standard cell libraries will offer you a series of
sizes, rarely (due to simulation support) a continuous
variability). Those would be "macros" unless I made the
effort to line up with standard cell library format constraints.
Sometimes I will make a few macros and follow a personal
quasi-standard-cell form (like, common rails, a couple of
route-through channels, pins sit on those channels, etc.)
for the benefits that has to future layout when a true
standard cell library is either not provided, or scaled
inappropriately for my application.

 

[ThisIsNotSam]

yes, inverters and buffers are present in every standard cell library.