bhuna.balu11@gmail.com
Junior Member level 1
I am doing my final year M.E project....For that i have drawn a 4x4 wallace tree multiplier and simulated using microwind 3.1. I have got a correct output in Schematic simulation in DSCH2.But, When i create a verilog file for that and Compile in Microwind 3.1 and create a layout, in the layout simulation, I am not able to view the correct inputs and outputs, the intermediate outputs are also available in the output layout simulation,(w91,w92,...)
For this What i can do for getting proper inputs and outputs in the output layout simulation??? Can anybody guide in this regard???
For this What i can do for getting proper inputs and outputs in the output layout simulation??? Can anybody guide in this regard???