ISCAS'89 Benchmark --verilog files required

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usha.mehta

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We need to generate test patterns using Mentor Graphics DFTAdvisor and Flex Test....but b4 dat we need verilog files to get synthesised netlist ....

Kindly send them on the below given e-mail id

Thanking in anticipation

Usha.S.Mehta
Research Scholar(Testing & Verification of VLSI Design)
usha.mehta@nirmauni.ac.in
 

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