ISCAS'89 Benchmark --verilog files required

[usha.mehta]

iscas 89

We need to generate test patterns using Mentor Graphics DFTAdvisor and Flex Test....but b4 dat we need verilog files to get synthesised netlist ....

Kindly send them on the below given e-mail id

Thanking in anticipation

Usha.S.Mehta
Research Scholar(Testing & Verification of VLSI Design)
usha.mehta@nirmauni.ac.in

 

[tariq786]

iscas89 benchmark

See if this helps

http://www.pld.ttu.ee/~maksim/benchmarks/iscas89/verilog/

 

[usha.mehta]

iscas89

http://www.pld.ttu.ee/~maksim/benchmarks/iscas89/verilog/
didn't helped.

 

[tariq786]

iscas 89 benchmark

what about these

https://www.eecs.umich.edu/~jhayes/iscas.restore/benchmark.html

 

[jayTudu]

iscas 89

You can find few of the circuits here....

http://www.pld.ttu.ee/~maksim/benchmarks/iscas89/verilog/

Added after 2 minutes:



Try this ..........

**broken link removed**