Is xilinx infer arrays used in code to BRAM or DRAM?

[naz56]

bram xilinx

HELLO,

when arrays are used in code then XST maps it to where by default?? into Block RAM? or into Distributed RAM?a big confusion...

difference between Block RAM and Distributed RAM?
help

regards

 

[palai_santosh]

it entirely depends on the size of the array and the coding style sometime.
Block ram is the dedicated ram blocks inside the fpga.
Distributed ram is basically using those Luts,SRL16 and flops in the CLBs.
block ram can operate faster than the distributed ram.

 

[naz56]

size of the array? explain...

 

[devas]

Hi,

A small RAM (small array size) is mostly targeted to Distributed RAM. A large RAM (large array size) is mostly targeted to Block RAM.

The trade off is probably a few hundred bits but depends also on your coding style and your target device.

Devas

 

[naz56]

thanx to all above ppl

 

[omara007]

I noticed that relatively big register arrays do take very long synthesis time .. for me, I was synthesizing an array of 32deepX42bits and it took me 5 hours (mainly consumed in the optimization phase !!) .. any reason for that ?