is this wrong phase plot?

[020170]

this is my amp's Bold plot and phase plot

is it wrong? if it is, where is it?

I've never seen phase plot like this.

Phase margin is not bad. but I'm not comfortable to see this phase plot. it is weird.

how about your opinion? In real world, this amp work properly?

**broken link removed**

 

[marshel]

maybe you can set ac source with magnitude -1.
Could you show us the testing circuit and maybe we can find the reason.

 

[eng_Semi]

the strange thing is that the phase begin with a positive sign.

It will be better if we see ur testbench

 

[Btrend]

from my opinion,
1. ur amp have 2 pole 1 zero, and the zero is between there two pole
the bode plot is o.k.
2. Usually in opamp, the zero will not so ahead the second pole, in ur case ur zero is move before the second pole for more than 10 times.
3. from (1) this amp should be stable when the feedback is connect from Vout to "-".
4. u must be using "-" terminal as ur AC input, so in dc u will always get a inverse "180" phase shift.

 

[020170]

**two stage with buffer and compensation cap and null resistor

*SPICE MOSFET MODEL FOR MIXED-SIGNAL IC DESIGN COURSE(09/13/03)

* MOSFET N-CHANNEL LEVEL=1 SPICE MODEL
.MODEL NCH NMOS(LEVEL=1 VTO=0.5 KP=100U TOX=300E-10 GAMMA=0.3
+LAMBDA=0.01 LD=0.1U PHI=0.7 NSUB=1E16 CGSO=400P CGDO=400P
+ CGBO=600P RSH=20 CJ=2E-4 CJSW=1E-9 MJ=0.5 MJSW=0.5)

* MOSFET P-CHANNEL LEVEL=1 SPICE MODEL
.MODEL PCH PMOS(LEVEL=1 VTO=-0.5 KP=40U TOX=300E-10 GAMMA=0.3
+LAMBDA=0.02 LD=0.1U PHI=0.7 NSUB=1E16 CGSO=400P CGDO=400P
+ CGBO=600P RSH=20 CJ=2E-4 CJSW=1E-9 MJ=0.5 MJSW=0.5)

.option scale=1u
Vdd Vdd gnd dc 2.5
Vss Vss gnd dc -2.5

Rb ext4 ext10 1.0k
M8 ext11 ext7 vss vss nch W=5 L=1
Cc 111 ext11 95p
*Rz ext7 111 833
Rz ext7 111 1.5K
M10 Vout ext10 vss vss nch W=10 L=1
M11 Vdd ext11 Vout vss nch W=80 L=1
M9 ext10 ext10 vss vss nch W=10 L=1
M2 ext7 V2 ext5 Vdd pch W=139 L=1 M=2
M1 ext6 V1 ext5 Vdd pch W=139 L=1 M=2
M6 ext11 ext4 Vdd Vdd pch W=20 L=1
M7 ext4 ext4 Vdd Vdd pch W=20 L=1
M5 ext5 ext4 Vdd Vdd pch W=20 L=1
M3 ext6 ext6 vss vss nch W=2.5 L=1
M4 ext7 ext6 vss vss nch W=2.5 L=1

.op
V1 V1 vcm ac 0.5
V2 V2 vcm ac 0.5 180
*Vcm vcm gnd pulse(5 0 0u 1n 1n 1u 2u )
Vcm Vcm gnd dc 0
.ac dec 20 10 100G
.print Vdb(vout) vdb(ext7)
.print V(*)
*.dc vcm 2.5 -2.5 0.1
*.tran 1n 10u
.pz V(Vout) V1

.end

 

[marshel]

I am not good at transfering netlist to schematic.
Anyway if you change the following lines
V1 V1 vcm ac 0.5 180
V2 V2 vcm ac 0.5
I think you can get the right phase plot.
It seems that your amp is a single output amp.
So why not simulate the open loop characteristics with the figure shown in the attachment? L0 and C0 can be set as large as you want,V2 can be used to set the CM voltage.

 

[Lantis]

This opamp phase margin is -58, not + 58.
It's unstable.
At DC, the phase is 180, at unit-gain freq, the phase is about -58. That is , the phase shife is more than 180.
I guess you use two-stage opamp, and the RHP zero is not cancelled by the nulled resistor.

It's my opinion, I hope it will help you.

 

[surianova]

this is my amp's Bold plot and phase plot

is it wrong? if it is, where is it?

I've never seen phase plot like this.

Phase margin is not bad. but I'm not comfortable to see this phase plot. it is weird.

how about your opinion? In real world, this amp work properly?

**broken link removed**

1. whenever you put the AC signal at the input, it must be at the input that use for negative feedback. Then you can get the phase start to roll off at 0 degree.



2. The best way according to me is to see where the phase response is starting from. Assuming that u have biased ur opamp in proper negative feedback:

a.) If the phase curve starts from 180 degrees, then PM should be measured w.r.t. the 0 degree axis i.e. the Phase value itself will give u the PM.

b.) If the phase curve starts from 0 degrees, then PM should be measured w.r.t. the -180 degree axis i.e. the Phase value + 180 degrees will give u the PM.

This technique always works well for me.