INSICIVE14.1 cannot generate delay on assignment

[littlebu]

I am running OVM env together with some behavior model descripted in verilog.
But seems it is never working....

assign #0.2ns A = B;

But below is OK (changed to always)

always @ * A <= #0.2ns B;

Since another env without OVM is OK, so i doubt it is related with OVM or some delay mode setting.

 

[littlebu]

I am running OVM env together with some behavior model descripted in verilog.
But seems it is never working....

assign #0.2ns A = B;

But below is OK (changed to always)

always @ * A <= #0.2ns B;

Since another env without OVM is OK, so i doubt it is related with OVM or some delay mode setting.

i have found root cause is SEQ_UDP_DELAY option, simulation is OK after removing this option.!!