Impedance of a signal on a trace on PCB and current capability

[engr_joni_ee]

Hi, I am wondering how the impedance of the signal on the trace is related to the frequency of the signal.

The impedance of the signal on the trace is normally a function of the trace width, dielectric constant of the substrate, core and pre-preg, and the distance to the plane. In the stack-up impedance calculator of PCB design tools, we need to input the dielectric constant of the substrate, core and pre-preg, define the location of the plane in the stack-up, width of the trace on routing layers and then it calculate the impedance of the signal with the given parameters.

How we can get the maximum frequency of the digital digital signal on that trace ?

and how to find the current capability of the trace for power lines ?

 

[KlausST]

Hi,

How we can get the maximum frequency of the digital digital signal on that trace ?

How do you "define" the maximum frequency?

It´s a question about
* how much power you put in
* loss over length
* how moch power the reciver needs to work properly (plus margin)

and how to find the current capability of the trace for power lines ?

for power lines... then this has nothing to do with impedance. It´s ohmic loss.
It´s a question of generated heat on the one side and spread heat on the other side.

For the characteristic impedance of a trace the length plays no role.
But for the ohmic loss the length of a trace plays a big role.

Klaus

 

[engr_joni_ee]

By frequency of digital signal I mean the frequency of a square wave signal of duty cycle 50 % and rise/fall time 10 %.

Regarding power lines, you mean that the traces on a given stack-up are characterized by power rating and then we can calculate how much current at a given voltage this power line can drive ?

 

[KlausST]

Hi,

By frequency of digital signal I mean the frequency of a square wave signal of duty cycle 50 % and rise/fall time 10 %.

Unless otherwise stated, when we talk about frequency limits we talk about sine waveform. But if you define "square wave" that´s O.K., too.
Now square wave consists of the fundamental frequency plus it´s overtones. So in a (upper) frequency limited system, the overtones become more attenuated than the fundamental. Thus the square wave becomes distorted. The output shape will differ from a clean square wave.

Now you "defined" the waveform. But still you did not define the "maximum". How do you define this limit?
For a sine it´s more simple: You usually do this by the attenuation.
Example:
For a 1st order low pass filter fc is defined when the amplitude drops to 71% (-3dB) of of input amplitude. So a 1kHz LPF still will have 2kHZ, 10kHz, 100kHz at it´s output .... but attenuated (more and more with rising frequency).
There is no (meaningful) frequency with zero output.

With square waves this is more difficult, since - due to the overtones the - shape depemds on the attenuation of each overtone (individually) and additionally on the phase shift.

I´m quite experienced with signal processing, measurements and so on, but I don´t know a general definition when distorted a square wave is considered to be "no square wave" anymore.

*****

Regarding power lines:
The limit does not depend on applied voltage. Disspation is defined by I x I x R_trace.

Klaus

 

[engr_joni_ee]

I am referring to the digital signals (square wave binary signal) on the FPGA based PCB. How do we know if a given PCB layout in a given stack-up is suitable for how many Mbps or Gbps if the signal is DDR and differential for example between ADC and FPGA. The question how the stack-up geometry and the material limit the digital signal speed if we don't use the word frequency.

Regarding the current capability, I mean if I have a PCB layout design in a stack-up of signal and power layers and dielectric in between and if I need to route power lines of +/- 5 V with copper traces, how much trace width should I use that can handle 1 A, 5 A and 10 A, What is the limit of current at a given voltage in a given PCB stack-up.

 

[FvM]

Current capability of power traces depends primarily on trace width and thickness, not voltage. You can e.g. use Saturn toolkit for the calculation. Secondly overall board power dissipation relative to size, enviroment temperature and possible convective or forced airflow plays a role.

Perfect transmission lines operated with matched impedance have no frequency limit if we don't consider possible wave guide modes occurring at high GHz frequency. Real microstrip and embedded stripline traches are limited by their imperfection, e.g. bends, vias and other discontinuities. Also substrate and conductor losses and deviation from impedance matching. There's no simple relation to stackup geometry. Follow application notes e.g. from FPGA vendors or use simulation tools like Hyperlynx or ADS.

 

[barry]

Hi,


Unless otherwise stated, when we talk about frequency limits we talk about sine waveform. But if you define "square wave" that´s O.K., too.
Now square wave consists of the fundamental frequency plus it´s overtones. So in a (upper) frequency limited system, the overtones become more attenuated than the fundamental. Thus the square wave becomes distorted. The output shape will differ from a clean square wave.

Now you "defined" the waveform. But still you did not define the "maximum". How do you define this limit?
For a sine it´s more simple: You usually do this by the attenuation.
Example:
For a 1st order low pass filter fc is defined when the amplitude drops to 71% (-3dB) of of input amplitude. So a 1kHz LPF still will have 2kHZ, 10kHz, 100kHz at it´s output .... but attenuated (more and more with rising frequency).
There is no (meaningful) frequency with zero output.

With square waves this is more difficult, since - due to the overtones the - shape depemds on the attenuation of each overtone (individually) and additionally on the phase shift.

I´m quite experienced with signal processing, measurements and so on, but I don´t know a general definition when distorted a square wave is considered to be "no square wave" anymore.

*****

Regarding power lines:
The limit does not depend on applied voltage. Disspation is defined by I x I x R_trace.

Klaus

the rule-of-thumb for square waves is that the 3dB frequency (bandwidth) is related by:

F=0.35/risetime.

But I think OP should be more concerned about signal integrity (reflections, etc.) Hyperlynx will give you that information, without having to worry about the “squareness” of the signal.

 

[engr_joni_ee]

Hi, I have searched for HyperLynx and found this

https://support.xilinx.com/s/article/955152?language=en_US

Any idea if they have free license to use in universities.

Not sure if HyperLynx is by Mentor or by Scimens.

 

[barry]

Hyperlynx is from Mentor, but Mentor was bought by siemens. i think you have to contact the mfr if you want a free license. I don’t think Hyperlynx is cheap. If you do an internet search for “hyperlynx cost“ you won’t find much; that tells you something…

 

[engr_joni_ee]

Yes HyperLynx is costly. How about the free software like KiCad and LTspice. Do they offer signal and power integrety simulation or any other free software with limited functionality.

 

[marce]

Current capacity of a trace...
IPC-2152 or use an online calc. Many use Saturn PCB Toolkit...

Most PCB design software has some for of signal integrity tool these days...