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logic of trace thickness

yefj

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Hello , Below there is an implementation i got to the AD8277 differential to single ended concerter .
i noticed that the designer some times used 50mil on the top and 56mil traces on buttom.
near the chip the traces are much thinner (30 mil)
I know that one possible cause is current consumption but its not a high current circuit.
Why the traces vaier in width threwout the layout?
Thanks.
1695503007978.png


1695502953173.png
 
I'd chalk this up to "more is better, until it isn't". Excess R
probably helps nothing, but fat traces congest routing and
may have to squeeze in, in spots.

Not every action has a chain of reasoning behind it, however.
Sometimes you just pick something by habit or by chance.
 
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    yefj

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Hi,

Honestly, the shown layout looks like from a random hobbyist.
Nothing you should learn from.

Most semiconductor datasheet include layout examples. Most semiconductor manufacturer provide PCB layout guidelines.
Almost every PCB layout software comes with tutorials.
And there are thousands of good PCB layout tutorial videos in the internet.
Why choose information from hobbyists over information from professionals?

Klaus
 
Considering that the highest current handled by the circuit is in a 10 mA order of magnitude, overall 0.25 - 0.3 mm (10 - 12 mil) traces would be more than sufficient. Your design rules may however set larger width for power nets independent of the actual current.
 

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