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Impedance Maching

Dummyeng

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HI
I want to design an Impedance matching line for transistor and in loadpull design i found out that 50 should be 0.3+j*1.8
i try to do it with smith chart in ads and i found out it is very hard

first i put q=2 circle and i want to do it in this circle but it is impossible
my frequency is 0.9 to 1.3 Ghz

should i first consider bode-fanno law?
or i can try harder
is there any approach that i can use that?
 

BigBoss

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Are you sure about Load Pull results ?? It seems to me a bit weird.
It's really low and direct matching may almost be impossible.But you can match onto different impedance closer to this value and continue step by step.Bandwidth is also not narrow..
 

E Kafeman

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Calculate matching result is possible but it is harder to design wide band optimized topologies and values in ADS for lossy components.

Real resistance ratio is about 150 times from 0.3 to 50 Ohm. It is a bit too much to match in a single step. It can easily cost a lot of losses.

Real resistance measurements below 1 Ohm and even minor calibration error can cause big final mismatch.

Doubt that 0.3+j1.8 Ohm is a constant impedance for whole 900-1300 MHz range? Even minor variations by frequency will affect wide band matching result.

If there is space enough can a PCB transformer or stub matching be to prefer, at least as a part of matching network as it can be designed with low resistive losses and less demand for an ideal ground plane.
With a such low impedance must probably matching network components be designed to handle possible losses as heat and max inductor current must be considered..

Assuming 0.3+j1.8 Ohm is actual impedance over whole freq.range and assuming ideal lossless matching components, then is tuning not that complicated to achieve for a VSWR less then 1:2.

Lossless example using standard values for reactive components.
smith_Lossless.png
Schema antenna symbol is here your transistor.

C1 value is 82pF. It is a very low impedance at 1300MHz.
C1 is an ideal component. A very ideal ground is then needed to be able to handle this capacitor properly or else will not expected matching result be achieved. This network have no DC decoupling which also can be a factor to take in account.

Ideal components is what often is used for these kinds of matching calculations but that will not result in optimal real world matching and ideal component calculations is often not what works best in real world, neither values or topology.

Implementing S-parameters for matching components gives somewhat more realistic result.

Optimal matching VSWR is in this case a bit less good when using real world components and it result in a different topology for optimal matching result:
smith_Murata.png
It is still a big capacitor to ground, which will demand very ideal circumstances to work as expected.

As a comparison showing how critical component properties are in this case, assume exact above matching component values but inductor L3 is replaced by a Murata LQW18AN with same inductance value:
smith_MurataLQW18.png
Impedance match is quite different at 1300 MHz as result of changing type of inductor.
It is partly possible to compensate for this by using a higher inductance value if using this type of inductor but point is that value is not an absolute factor when calculate an impedance matching network..
Adding smaller variations in pads locations, ground plane current path, and minor variations in capacitor losses and resulting total matching can vary quite a lot.

All above matching typologies are hard to implement due big impedance ratio and due to this a need for more or less lossless components and ideal ground.
By reducing impedance match goal to something less demanding and by adding a matching component is it somewhat easier to actually achieve theoretical calculated result also as a measured result.

A such proposal:
smith_MurataLQP.png
It is still not an easy task to implement this 4-pole matching network with its serial and parallel resonances, which can make component values more critical but we have got rid of the extrem component value for a first big capacitor to ground as in previous network.
Careful measurement is recommended to verify, and if needed, adjust each pole step by step to be able to take in account for non ideal losses and delays and practical problems related to very low impedance measurements. Doing so is it possible to get a decent match very similar to above calculated Smith chart curve.

One reason that this network is easier to implement is that we are using L1 reactive unlinearity to our tuning advantage as its SRF is around 2-3 GHz.
Do the exercise in ADS and replace this inductor with something else of same value to see difference.
Network real world transmission loss is about 1.5 dB if a stable ground plane.
 

FvM

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If the impedance numbers < 1 ohm are real, they are most likely observed with MOS power transistors. 50 ohms impedance matching over a 1:1.5 band is almost impossible with LC networks or TL stubs. Transmission transformers are the most promising option. Polyfet published many nice design suggestions.

Small band matching networks are feasible, preferably of the multi stage type. Surely not using small SMD inductors.
 

Dummyeng

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Calculate matching result is possible but it is harder to design wide band optimized topologies and values in ADS for lossy components.

Real resistance ratio is about 150 times from 0.3 to 50 Ohm. It is a bit too much to match in a single step. It can easily cost a lot of losses.

Real resistance measurements below 1 Ohm and even minor calibration error can cause big final mismatch.

Doubt that 0.3+j1.8 Ohm is a constant impedance for whole 900-1300 MHz range? Even minor variations by frequency will affect wide band matching result.

If there is space enough can a PCB transformer or stub matching be to prefer, at least as a part of matching network as it can be designed with low resistive losses and less demand for an ideal ground plane.
With a such low impedance must probably matching network components be designed to handle possible losses as heat and max inductor current must be considered..

Assuming 0.3+j1.8 Ohm is actual impedance over whole freq.range and assuming ideal lossless matching components, then is tuning not that complicated to achieve for a VSWR less then 1:2.

Lossless example using standard values for reactive components.
View attachment 166693
Schema antenna symbol is here your transistor.

C1 value is 82pF. It is a very low impedance at 1300MHz.
C1 is an ideal component. A very ideal ground is then needed to be able to handle this capacitor properly or else will not expected matching result be achieved. This network have no DC decoupling which also can be a factor to take in account.

Ideal components is what often is used for these kinds of matching calculations but that will not result in optimal real world matching and ideal component calculations is often not what works best in real world, neither values or topology.

Implementing S-parameters for matching components gives somewhat more realistic result.

Optimal matching VSWR is in this case a bit less good when using real world components and it result in a different topology for optimal matching result:
View attachment 166695
It is still a big capacitor to ground, which will demand very ideal circumstances to work as expected.

As a comparison showing how critical component properties are in this case, assume exact above matching component values but inductor L3 is replaced by a Murata LQW18AN with same inductance value:
View attachment 166699
Impedance match is quite different at 1300 MHz as result of changing type of inductor.
It is partly possible to compensate for this by using a higher inductance value if using this type of inductor but point is that value is not an absolute factor when calculate an impedance matching network..
Adding smaller variations in pads locations, ground plane current path, and minor variations in capacitor losses and resulting total matching can vary quite a lot.

All above matching typologies are hard to implement due big impedance ratio and due to this a need for more or less lossless components and ideal ground.
By reducing impedance match goal to something less demanding and by adding a matching component is it somewhat easier to actually achieve theoretical calculated result also as a measured result.

A such proposal:
View attachment 166703
It is still not an easy task to implement this 4-pole matching network with its serial and parallel resonances, which can make component values more critical but we have got rid of the extrem component value for a first big capacitor to ground as in previous network.
Careful measurement is recommended to verify, and if needed, adjust each pole step by step to be able to take in account for non ideal losses and delays and practical problems related to very low impedance measurements. Doing so is it possible to get a decent match very similar to above calculated Smith chart curve.

One reason that this network is easier to implement is that we are using L1 reactive unlinearity to our tuning advantage as its SRF is around 2-3 GHz.
Do the exercise in ADS and replace this inductor with something else of same value to see difference.
Network real world transmission loss is about 1.5 dB if a stable ground plane.
thank you for ur response
it isn't good for my design because there are alot of tolerance in lumped elements and other reason is that i havent seen in near of transistor put a inductor first i should put mline then parallel capacitor and ... i am not professional an it is what i saw up to now so i try another way
Are you sure about Load Pull results ?? It seems to me a bit weird.
It's really low and direct matching may almost be impossible.But you can match onto different impedance closer to this value and continue step by step.Bandwidth is also not narrow..
yes i do it
first i put a 5 ohm impedance and then with m taper build an impedance matching network

i can get almost flatness power but my network isnt stable and mu factor is under 1

have you any idea?
 

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volker@muehlhaus

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Your design cascades elements with very different widths, which don't fit together, and you have no MSTEP between them to include the electrical effect of that step.

You need to think of layout implementation, not just use random numbers in optimization.
 

Dummyeng

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Your design cascades elements with very different widths, which don't fit together, and you have no MSTEP between them to include the electrical effect of that step.

You need to think of layout implementation, not just use random numbers in optimization.
yes i agree with you
but first i want to know if it is possible or not in ideal conditions and then i redeign it for reality
 

JohnBG

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It may be the case that knowing what transistor(s) is going to show matching networks sometimes made available in transistor datasheets.

what is the transistor(s) reference? what manufacturer did you choose?
 

mtwieg

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Is 0.3+1.8j the simulated output impedance of the amplifier, or the optimal load impedance for max power/efficiency? Because often those two numbers are very different.

Is this a push pull amplifier? If so, then a transmission line transformer will help a lot.
 

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