xeratule
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Have you checked that high side and low side IGBTs are not turned on at the same time, changing the deadtime would avoid this situation. Is the figure you are sending from high or low side switch?
Provably the gate driver circuit you does not perform correctly... Is it isolated?
Would be helpful if you post a schematic on this.
1. ...I believe the major contributor of heat comes from the conduction loss...
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2. ... Add filter caps and zener diodes to reduce the ripple.
What's your switching frequency by the way?
It's important to know, that the bus voltage has sufficient low inductance bypass capacitors and is wired appropiately. Also, you should clarify that the opposite bridge transistor is previously switched off and kept in this state during turn-on of the transistor of interest.
So wait, these are just waveforms of the low side FET gates (Q3 and Q4)? What I'd like to see is the gate waveforms of a single half bridge (Q1 and Q3 or Q2 and Q4). Or, if you don't have an isolated probe, show the gate waveform of a low side gate and its drain voltage. It looks like you may be suffering from capacitive coupling from drain to gate, but it's impossible to tell for sure with those waveforms you posted.There is neither probing, nor same time switching on failure (proper dead time is arranged). But, yes I noticed important switching noise at 15V supply rail. Maybe that causes the optocoupler to switch off for a short time. This noise should be the ground bounce caused by switching IGBTs. Please see the figures below. They are low side IGBT gate rise and fall times with different view. Clear signals are (named as closed) when Vcc is not applied to IGBT's. You can see dead time clearly.
View attachment 57287
View attachment 57288
View attachment 57289
View attachment 57290
How can I neglect ground bounce that effects 15V supply rail?
So I tend to prefer the other explanation for the time being, feedback to the primary side.
1. Is this transformer built to operate in your intended frequency? .
I can't simulate transformers with my current program. I also wish I could do layout EMI simulation.2. Is it possible for you to make an electrical model and simulate this? I am thinking you may have to look at the problem from Control Engineering persepctive to tackle oscillations..
I also contact the manufacturer, they didn't say any restrictions about this purpose of use.3. Did the IGBT datasheet highlight any suggestions or recommendations when used in similar applications like yours?.
I am new at power electronics so actually could you suggest me some links about this type argumets.4. Did you check on the Internet if anyone has used this exact IGBT parts and they may have faced problems like yours? Sometimes it may be component issues and there could be work-around solutions posted online.
...if you don't have an isolated probe, show the gate waveform of a low side gate and its drain voltage.
The assumption is in fact, that shoot-through is the basic problem, also causing excessive losses. The problem is not about missing dead time but self turn-on of transistors due to Cdg capacitance. The gate waveform would look like the observed ones in this case.I 'll first solve my basic problems then should think about shoot through problems. I measure the Vce rise and fall times and see no shoot through problem as fixed dead time is quiet adequate. Am I missing something here?
Actually I thought I could use TVS'es at Vce's of IGBT's but those transients would not pass directly to the ground at high side. As the high side IGBT's are floating, those transients would also pass through the load, or maybe short circuit with low side IGBT's. Is there any suitable snubber circuit for full bridge high side transistors?Shouldn't you have snubbers across collector - emitter of IGBTs ?
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