Feb 17, 2014 #1 A abhinavpr Junior Member level 2 Joined Jun 19, 2013 Messages 21 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 205 Hi, I urgently need a simple I2C/smbus slave to be connected to a memory. It would be of great help if somebody can provide a simplistic design in verilog or docs regards abhinav pr
Hi, I urgently need a simple I2C/smbus slave to be connected to a memory. It would be of great help if somebody can provide a simplistic design in verilog or docs regards abhinav pr
Feb 17, 2014 #2 R rca Advanced Member level 5 Joined May 20, 2010 Messages 1,527 Helped 355 Reputation 710 Reaction score 336 Trophy points 1,363 Location Marin Activity points 8,773 there are some ip on opencore.org
Feb 26, 2014 #3 A abhinavpr Junior Member level 2 Joined Jun 19, 2013 Messages 21 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 205 Hi, i am designing an I2C slave module . the spec says data on SDA can only change when SCL is low. can somebody tell me how to achieve that . for write operation its easy as we can sample SDA at rising edge of SCL as the data is stable before SCL rising edge but how do we write into SDA during the READ operation? as the data must be written into SDA before the arrival of SCL rising edge.
Hi, i am designing an I2C slave module . the spec says data on SDA can only change when SCL is low. can somebody tell me how to achieve that . for write operation its easy as we can sample SDA at rising edge of SCL as the data is stable before SCL rising edge but how do we write into SDA during the READ operation? as the data must be written into SDA before the arrival of SCL rising edge.