thanhFF
Junior Member level 2
Hi all,
I am using TetraMAX to generate test patterns for a full adder code. The problem is at the stage "Write Patterns", Synopsys no longer let us the patterns in Verilog or VHDL, you will receive the error "write_patterns -format verilog_single_file is obsolete; command ignored". I can only save as STIL, binary....But I want to have a look at patterns so understand what has been generated(Simvision was used to read verilog patterns). Does anyone know the way I can review the patterns from TetraMax?
Thanks
I am using TetraMAX to generate test patterns for a full adder code. The problem is at the stage "Write Patterns", Synopsys no longer let us the patterns in Verilog or VHDL, you will receive the error "write_patterns -format verilog_single_file is obsolete; command ignored". I can only save as STIL, binary....But I want to have a look at patterns so understand what has been generated(Simvision was used to read verilog patterns). Does anyone know the way I can review the patterns from TetraMax?
Thanks