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how to place & route in CADENCE?

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longstar

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place and route tutorial cadence

Hi,guys
I have got a trouble,how to auto place & route in CADENCE?Could you give some details or link?
thanks
RGDs.
longstar
 

urslen

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ece.virginia.edu + cadence

Place and Route with SoC Encounter

A html tutorial in depth... good one with proper explanatory pictures and links. I am sure that it will help you.
 

anjali

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cadence place and route tutorial

you can see this workshop ( pdf is available)
 

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  • workshopdtmf_132.pdf
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vdevan77

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if needed i can upload the training material of SE here

Thanks
 

draz

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Can you elaborate on what exactly you want to know about cadence tool.

I work on cadence First encounter at my workplace.

You first start with floorplanning of you top level Chip or block level Module.

Floorplanning is creating the physical dimensions for the chip/block, Placing custom macros or memories and creating the power grid structure.

Now comes your Placement and routing part.

In place ment you have to give a "timing driven placent" option in first encounter. which will do the place ment od your standard cells.

Next you create a Clock tree structure for all the clocks in the design.

Then you do your ROUTING which is done by the Detail route option in First encounter.


This is a very very brief explanation of PNR in cadence First encounter.

You can go thru the book suggested by anjali but there will be practical examples in it for which you will need the setup files.

maybe you can try downloading them from cadence site

that wil give you a very good idea on how to do PNR in cadence.

let me know if you need anything else

thanks
Draz
 

jelydonut

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if you spend some time googling it (tutorial, etc) you will find quite a bit.. definatly enough to get you started..

jelydonut
 

sree205

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Hi, is there a way i can get some sample designs to work on ?
 

johnz

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can take look some tutorials in soc encounter direction like that encounter_installation_direction/etc/share/~ .
 

p_shinde

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hi,
can i do place and route in Virtuoso, as if i dont have any verilog file which is one of the input of encounter, then how do we place and route using standard cell layouts, or with schematic , is it possible in virtuoso?????????


thanks in advance,
Prasad
 

disney

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p_shinde said:
hi,
can i do place and route in Virtuoso, as if i dont have any verilog file which is one of the input of encounter, then how do we place and route using standard cell layouts, or with schematic , is it possible in virtuoso?????????


thanks in advance,
Prasad
Yes you can, after the placement and routing you can do a DEFOUT and DEFIN in encounter OR in OA you can save the design in Virtuoso and oaIn in encounter.... its very easy.
 

novicevlsi

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hi disney,


i have EXPERT a tool similar to virtuoso. my doubt is same as shinde's can u elaborate it more....

in expert , everything is manual... then how to P&R for large designs/

thnks
 

p.sivakumar

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Hi

if you are working in industry ,you can use updated version of cadence encounter user guide,otherwise you can follow already posted encounter user guide .But the continution of present version in market was 4.1,5.2,6.1.

and you can use cadence source link for forther doubts

Regards
Siva

Added after 7 minutes:

Hi

Here i am posting 4.2 version encounter user guide.It will very helpfull for starters

Regards
Siva
 

p.sivakumar

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Hi

Here i am posting 4.2 version encounter user guide.It will very helpfull for starters

Regards
Siva
 

appala.pradeep

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socug is very good start, but it takes time be patiance
 

ch1pz

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I am just learning to use these tools right now, especially Virtuoso so this is very good information.
 

G

Guest

Guest
place:a)block place -> manual palce is preferred
b) STD cells place
route:special net route -->manual
wroute :auto route
 

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  • soc_cell-based_ic_physical_design_and_verification-soc_encounter_1418.pdf
    3.6 MB · Views: 235

ch1pz

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Hi sorry for double post but I had a question regarding the Virtuoso SPR tool. Does it allow you to import your own synthesized verilog file (from Leonardo Spectrum) and use that to run the SPR? I have searched for tutorials and found a couple but most are on Encounter.

Thanks!
 

ed2000

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For analog IC design use please either Neocell or new Virtuoso Family (IC6.10)
 

dsairajkiran

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hi longstar,

In cadence first encounter,macros are placed manually by the help of flight lines and then standard cells are placed automatically.
This can be a timing or congestion driven placement. Once the condition is met go for trail routing and so on..........as in the flow.
 

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