mayank8071
Newbie level 1
how to make test plan for asynchronous fifo which have write clock =250 Mhz and read =125Mhz
specification:
wr ,
wr_clk,
rd,
rd_signal,
data bit 8bits,
deapth of FIFO 16 bit
specification:
wr ,
wr_clk,
rd,
rd_signal,
data bit 8bits,
deapth of FIFO 16 bit