how to generate memory? Memory Compiler

[sevid]

how to generate memory?

hi, everyone

there are 2 questions about memory.

1 in general, an off-chip rom or ram is only generated for simulation, and neednot to be synthesized.
the question is if u need to synthesize an on-chip ram or register file, or generate it with the help of "Memory Compiler" as in question 2.


2 as i know, the memory is generated with "Memory Compiler".
1) Memory Compiler -> *.lib
2) Library Compiler: *.lib -> *.db
3) *.db as a "link_library" of DC

my question is when u synthesize ur deisgn, the corresponding code "memory.v" in ur design looks like the desciption below,or other forms,or neednot a memery verilog at all ?

module memory(... );
input ...;
output ...;
always @(posedge clk)
if (memwrite_en == 1)
memory[write_add] <= write_data;
assign read_data = memory[read_add];
endmodule

SOS!!!
and every advice will be appreciated.

sevid

 

[HolySaint]

how to generate memory?

u can use the .db
then the .v model can be dismissed

 

[sevid]

how to generate memory?

thanks to HolySaint.

but u should instantiate ur memory in ur .v file as fowllowing, someone said.

module memory ()
input ...;
output ...;
ram32x32 U1(...);
ram32x32 U2(...);
...
endmodule


and then "set_dont_touch" to "U1" and "U2" in ur scripts of DC.

right or not?

thanks in advance.

sevid

 

[ljxpjpjljx]

Re: how to generate memory?

as I know ,the DENALI model can be generated by its script!

 

[HolySaint]

how to generate memory?

i use the db file to syn
i set mems dont tounch

my mems are generated by memory compiler