Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
For soc chip power calculations one procedure is that use any power tool (ex: prime power) for calculation of power OR theritical method as follows. vendor will supply the power values for the MACROs , for memory macros we have comupte the power by using the following formula power P= (((read current +write current)/2 )*voltage *frequency, and coming for standard cells take equaualent nand gate power multiply with gate count then u can get the standard cell power. Finally by adding all these powers u can get avarage power value.
besides EDA tools, there r some ways else to estimate the chip power consumption. In my project, we use VCD file from simulation to estimate power comsumption
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.