ee_joe
Newbie level 6
Hi all,
I want do post simulation with NCVERILOG.
What I have are *.v, *.lib, *.db and *.dspf, here the dspf file is RC parasitics extacted from layout, *.v is gate level netlist.
How to do the post simulation with back annotated dspf file and lib file?
thanks all!
I want do post simulation with NCVERILOG.
What I have are *.v, *.lib, *.db and *.dspf, here the dspf file is RC parasitics extacted from layout, *.v is gate level netlist.
How to do the post simulation with back annotated dspf file and lib file?
thanks all!