I am doing mixed-signal simulation with Cadence SpectreVerilog. I have to apply test vectors to a memory. So, if someone knows: is it possible to use Verilog-XL if arrays are analog and periphery is digital? And, in general, I would like to get more information about mixed-signal simulation with Cadence? :!:
I am doing mixed-signal simulation with Cadence SpectreVerilog. I have to apply test vectors to a memory. So, if someone knows: is it possible to use Verilog-XL if arrays are analog and periphery is digital? And, in general, I would like to get more information about mixed-signal simulation with Cadence? :!:
Ok, it could be possible to use Dolphin Smash, but how can I use it together with Cadence. The memory cells are designed by Skill, the periphery by Verilog, or it might be I see the problem in wrong way.[align=left] :?