Please guys - the post is about comparators, not whether you have personally seen a 12v gate. I have a process with 5v, 16v, and 30v gates that I use quite often. I suggest you guys keep looking.
back to Andy's question....
The trick will be keeping the (Internal) voltage swings small in order to be fast. Current comparator style is OK, but clamp the nodes so they can't swing Vdd-GND else it will be very slow.
I am thinking of a cascade of 3 low-gain (10 or less) diff amps (outputting to resistors), then a low-voltage to high-voltage translator. The final output would be an inverter. The trick is you need to drive that inverter's gate from 0-VDD, but the output of the last diff stage is probably 0-1v. You could use two NMOS to flip a level-shift, but I don't know if it would be fast enough.
You could probably get through the diff amps in 2-3ns, but driving that output inverter may be slower than you can tolerate.
The Li book (CMOS ckt dsn, simulation, and layout) has a 10ns comparator that may work for you if you can't get a 2ns level shift.