shiv_emf
Advanced Member level 2
Do v consider Magnetic effect as one of constraints ??
suppose chip is to working in Magnetic field so to avoid undesirable effects... r v taking care when synthesizing RTL ??
Design compiler has no command related to magnetic effect ..
do v ignore this issue???
thanq
suppose chip is to working in Magnetic field so to avoid undesirable effects... r v taking care when synthesizing RTL ??
Design compiler has no command related to magnetic effect ..
do v ignore this issue???
thanq