How to choose the width and length for the digital logic design?

[Esakki raja]

How to choose the width and length for the digital logic?

Are there rules that follow it?

 

[alam4vlsi]

Re: Digital logic design

What do you mean? Transistor width and Length? or else any?

 

[Mohammed_Verification]

Re: Digital logic design

what is digital logic that you are mentioning?
Length and Width of which component?
Be clear with your question?

 

[Esakki raja]

Re: Digital logic design

i explain my question clearly .For example for the inverter design how to choose the pmos width and nmos width?is there any consideration like duty cycle and anything

 

[Nanda San]

Re: Digital logic design

You need to decide the width depending upon the correlation between the rise, time fall time and propagation delay of the inverter for multiple drive strengths.

You should be narrowing down the margin between rise and fall time .. ( difference if any should be in order of < 1 ps ).
In order to achieve this you may need to tweak the widths of the pmos and nmos..
Roughly for a SMIC 55 inverter with drive strength 1 you would need 1.15 um pmos and 500 nm nmos width to achieve this co-relation.

 

[OhaAmo]

Re: Digital logic design

There are many articles about sizing of standard library cells, their width and length. just google it.