How to calculate gate count in ISE

[electronical]

I have a report synt in ISE .how can I calculate gate count ?

 

[mrflibble]

Re: calculate gate count in

step one: open window

step two: firmly grasp illusion that gate count is a useful metric on modern fpga's

step three: toss illusion out the window,. Weeeey! ^_^

step four: close window


Or the alternative version: whose "equivalent gate count" method would you like to use? And what do you think you can do with it?

Anyways: resource usage in terms of slices / clock resources / etc is a whole lot more useful on fpga IMO. And luckily you already get these in the synthesis report.

 

[TrickyDicky]

Re: calculate gate count in

one logic element can have any number of gates in them. From one to many (depending on family)

So gate count is a useless metric for FPGAs.

 

[electronical]

Re: calculate gate count in

So gate count is a useless metric for FPGAs.

I want to compare two area of design ,which way can I compare?

 

[mrflibble]

Re: calculate gate count in

Q: i want to compare two area of design ,which way can i compare?

A: Resource usage in terms of slices / clock resources / etc is a whole lot more useful on fpga imo. And luckily you already get these in the synthesis report.