dft drc
Hi Nikhil,
First thing you cannot get C4 in the pre_dft drc, it will be some D violation.
Second, you have not used the command
set_dft_configuration -fix_reset enable ( may be you miss to write that here)
Further, I dont think that autofix will solve this problem. It is a capture issue and not scan shift issue. What I think is happening here is that , your reset pin before reaching the flop is gated with testmode and then reaches the flop. The flops are not failing the drc and coming on the scan chain because the reset on the pin of the flops is in inactive state.
You can trace the top level reset pin in your design to see if it is getting gated some where.
In DC you can use the command
all_fanout -from reset
-cheers
vlsi_eda_guy