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how to analyse this circuit?

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wjxcom

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Hi, all: the file in the attachment is a OPA and this circuit puzzles me.

1.why we must use the Q6 and Q7 which act as a class B push-pull output stage? and why Q6 and Q7 can act as a class B push-pull output stage?

2.the dc biasing is designed so that Q8 and Q9 have equal-value small gate-to-source dc bias. This maximizes the linear Vout range. I do not know why.
 

Davood Amerion

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Hi wjxcom
Q5,Q7 are configured as current source.
I think Q6 used for voltage level shifter for Q9.

Regards,
Davood Amerion.
 

sixth

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wjxcom said:
Hi, all: the file in the attachment is a OPA and this circuit puzzles me.

1.why we must use the Q6 and Q7 which act as a class B push-pull output stage? and why Q6 and Q7 can act as a class B push-pull output stage?

2.the dc biasing is designed so that Q8 and Q9 have equal-value small gate-to-source dc bias. This maximizes the linear Vout range. I do not know why.
Hi,
I think the class B push pull stage is formed by Q8 and Q9, not Q6 and Q7, right? The small Vgs is biased because if the Vgs is large, the transistor will enter the linear region very easily.

sixth
 

pixel

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wjxcom said:
Hi, all: the file in the attachment is a OPA and this circuit puzzles me.

1.why we must use the Q6 and Q7 which act as a class B push-pull output stage? and why Q6 and Q7 can act as a class B push-pull output stage?

2.the dc biasing is designed so that Q8 and Q9 have equal-value small gate-to-source dc bias. This maximizes the linear Vout range. I do not know why.
1. Q6 and Q7 cannot act as class B, because Q7 does not amplify input signal ( it is current source - constant voltage at the gate)
Q6 is source follower (lewel shifter with gain 1).
-> you dont have amplification

2. what is the meaning of small gate-to-source dc bias?
 

mists

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but q6 and q7 make a level shifter which let the first stage can push-pull output stage q8-q9, but i think this op ll need miller compensation.
 

butterfish

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but q6 and q7 make a level shifter which let the first stage can push-pull output stage q8-q9, but i think this op ll need miller compensation.
Hi,mists,

Could you tell us how to add the miller compensation in this op?
Thanks!

fish
 

sivani_vs

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It seems that last q8 and q9 are of diffrent type. hence they can be pushpull type.

Q6 and Q7 are looking to be of same type, so, they cant be push pull pair.
 

mpig09

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Dear wjxcom :

I think it is a comparator,
Q6 and Q7 are import for your vi+ & vi-
you need to know the transform voltage when output H or L !!!
Maybe it is why Q6 and Q7 act as a class B push-pull output stage



Best Regards,
mpig09
 

wjxcom

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which MOS can act as push-pull? Q6,Q7 or Q8,Q9?
 

mists

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q8 and q9 is push-pull
q6-q7 is just level shifter
miller conpesation maybe need to add from point A to B.
 

Davood Amerion

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hi wjxcom
i think it is better to read above posts one more time.
:D
 

avinash

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Q6 and Q7 are used as source follower.this provides adjustable gate voltage for Q9 to have maximum o/p range.otherwise if Q6 and Q7 were not used,Q9 will start to flow constant current becuase having constant gate voltage.this will give fixed maximum voltage(upper limit).
 

Davood Amerion

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avinash
Q6 and Q7 are used as source follower.this provides adjustable gate voltage for Q9 to have maximum o/p range.otherwise if Q6 and Q7 were not used,Q9 will start to flow constant current becuase having constant gate voltage.this will give fixed maximum voltage(upper limit).
do you know whitch pin of Q7 is SOURCE?
how you say Q7 is source follower?
In source follower GATE is input and SOURCE is output
 

wjxcom

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Hi,Davood AmerionL: I think Q6 is a source follower?
is it?
 

pixel

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Davood Amerion said:
avinash
do you know whitch pin of Q7 is SOURCE?
how you say Q7 is source follower?
In source follower GATE is input and SOURCE is output
Q6 is source follower, and Q7 is constant current source (Vbias=const) that bias source follower. Output of the source follower ia at the gate of Q9.
Just look the schematic.
 

Davood Amerion

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yes Q6 is source follower but in this circuit source follower not needed, i think it is used for level shifting, becuase in source follower we have (VT volts) level shifting.
 

sk1105

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agree to mists:
q8 and q9 is push-pull
q6-q7 is just level shifter
this can prevents the amp enter the linear region, and maximizes the linear Vout range.
 

Davood Amerion

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Yes Q8, Q9 are pushpull but Q5, Q7 are current source and there
currents depend on Vbias and there (W/L)s.
 

engronger

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1、the transistor act as a push-pull output stage, i think, are Q8 and Q9. the configuration consist of Q6 and Q7 is a soure follower and give the bias to Q9. the push-pull output stage can give a maximize output swing. as i know this stage is used more in bipolar circuits

2. sorry i could not understand what equal-value small gate-to source dc bias mean here.

newsun

wjxcom said:
Hi, all: the file in the attachment is a OPA and this circuit puzzles me.

1.why we must use the Q6 and Q7 which act as a class B push-pull output stage? and why Q6 and Q7 can act as a class B push-pull output stage?

2.the dc biasing is designed so that Q8 and Q9 have equal-value small gate-to-source dc bias. This maximizes the linear Vout range. I do not know why.
 

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