In our backend design flow (EDA tools is ASTRO), ASTRO do change netlist during floorplan and placement by sizing cells or adding, removing, sizing buffer to meet timing requirements (to meet setup or hold time). not just adjust the position of the cells.
microe_victor said:
do the EDA tools change the netlist during floorplan and placement to meet the timing requirement ? or just adjust the position of the cells?
if we adjust the position of the cell, what is changed by doing this except the wire and all timing information related to the wire?
what can we do in Physical Synthesis?
thanks