how can you interpret qor.rpt from design compiler?

[u24c02]

Hi.

I want to know how can you interpret the qor.rpt from design compiler?

As I know, there are summarized timing path group IN2OUT IN2REG REG2OUT REG2REG i_clk cell count Area Design Rules.
Especially, how can I interpret IN2OUT IN2REG REG2OUT REG2REG?

Would you please let me know how can you interpret that? Also what am I do for check? What should I check of that? What am I do next?

 

[ajayg]

Hey,
IN2OUT is the timing path for Input port to Output port
IN2REG is timing path form Input to Register[flop]
REG2REG timing path from Register to Register[flop]
REG2OUT timing path from Register to Output port.

Go through some timing concepts to understand the abv paths.
You can find some documents in the RTL Compiler installation path . Refer to a document with file name "rc_ta.pdf" which is a RTL Compiler Timing Analysis guide.