Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Small size of NMOS transistors make higher scale of integration. Simpler to make. It is not good as CMOS in static power consumption but better than BJT based logic circutis... I dont know for disadvantages, that would be more like limitation. They are not to resistant to high voltages such as 20V, because punch through, or because SiO2 is thick and could destroy transistor.
There are also parasite BJT's in NMOS transistors. If you take the source to the more negative voltage than base , you get BJT betwean source-base-drain.
They are not as fast as ECL logic, but can compete with other...
Dynamics depends of lots and lots of parasite capacities in NMOS, due to small currents they operate, so they are not good for SSI and MSI.
They have simpliest structure, with smallest number of transtors so they are sutable for LSI and VLSI circuits.
Book for you is: R. Gregorian, G.C. Temes, "Analog MOS integrated circuits for digital processing", Wiley, New York
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.