hi all,
my library doesnt have a d-flip flop clear/preset signals,it only has a dff.
but to synthesize a design i need a flip-flop with clear/preset signals.
if i include a latch in my library can the synthesis tool synthsize a dff with preset/clear signals using the latch
I have a question.
Will the synthesizer at this case use whatever is present in the library and add some combinational logic before to the DFF to simulate the preset and clear functionality. I find it logical.
Any comments?
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Amr Ali
@amraldo: Yes, the synthesis tool will implement the logic as specified in RTL with whatever cells it has in the library. The tool does not alter the logic/functionality. If you run an equivalence check between the RTL and synthesized netlist, it will and should pass.