Help me to design a NOR gate using THREE tri-state inverters

[sathi.ec]

Hi frds,

Help me to design a NOR gate using THREE tri-state inverters and wired-AND logic should not be used.

Thanks Regards,

 

[sam31]

Re: NOR gate Design

:idea: :
I consider
a :arrow: tristate input
x :arrow: tristate output
e :arrow: tristate enable (active high)

gate U1, U2 and U3

U1(a) connected to '0'
U1(e) connected to first input
U1(x) connected to U3(e) + pullup
U2(a) connected to '0'
U2(e) connected to second input
U2(x) connected to U3(a) + pullup

U3(x) connected to a pulldown >> NOR output

LUT:

In1    In2    U1(x)    U2(x)    U3(x)
 0       0       1w        1w        1s
 0       1       1w        0s        0s
 1       0        0s        1w       0w 
 1       1        0s        0s        0w

0/1w : 0/1 weak  
0/1s  : 0/1 strong

Notice:
:arrow: U1 and U2 work as an inverter and U3 as an AND gate ≡ /In1 AND /In2 ≡ In1 NOR In2
:arrow: By wiring U1 and U2 outputs you can remove U3