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Help me design a 32 bit ALU in VHDL

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eda_wiz

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hi all,
I was thinking of designing a 32 bit alu with vhdl.. I have coded with functionalites add,sub,and,or,etc....(no multiplication and divsion)..

My doubt is i just wrote
case (selectinput)

when 001-> c<- a and b;

likewise..

is it this much easy to design an alu.. or I am doing something wrong ..
pleas advise..
also How would I implement a multiplier functionalty along with an alu..
thanks
smartie
 

husteven

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32 bit alu

In design alu, you should define the adder yourself,
according to overflow or no overflow.
what's more, you should copperate you alu with the operation module.
it is not easy.It is better refer to some book
 

Stark

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Alu

Take a look here!
multiplication is very simple to describe but it requires a large quantity of logic specially for a 32 bit magnitude

a <= b * c;

a b c signed or unsigned type or if you want std_logic_vector

bye Stark.
 

linuxluo

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Hi, Stark
I think if you want to design your ALU efficiently, you have to consider gate-level design because synthesis is not very efficiently for datapath design but for control flow design. So you have to consider the detail circuit of your ALU.
Usually, adder is the basic functuinal macro in ALU, and combine with other logical functions , for instance, and ,or ,etc.
And I think some books you can read and they are helpful for your design.
 

eda_wiz

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HI stark,
I dont think that is an efficient method for implementing a multiplier . U will surely get the simulation results correctly but from an implementation point of view , I think that wont be feasible. If I am wrong Please someone correct me ...........
How about implementing a booth's algorithm based multiplier

thanks
smartkid
 

uil

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first you must design the architecture and decide the pamameter
then design the data passage and control papssage.
at last you must design the adder,multiplier and the shift and the rigster .
good luck
 

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