Help!!- Hidden remap fail

[avd]

Hi there,
Can anyone tell me what a this message means?
"Hidden remap fail"

I'm using Xilinx ISE 5.1 and when I try to simulate the code using Model sim 5.6 I get this error. The code compiles perfectly, and 'Implement Design' passes without fail.

Thanks,
Andrew

 

[maestor]

Hi avd,

I haven't seen this error before to be honest.

I know you can us the -m switch (hidden switch) to map your design when it doesn't fit.

**broken link removed**

It could be that you need this switch on because your design doesn't fit... :?

Regards,

-maestor