You can just use the hierarchical path to any signals to reference it. Assuming the module design_unit is the top-level module (i.e. not instantiated anywhere), then you can do this:
always @(design_unit.int_reg) <--- int_reg is not input/output of design unit
If the module design_unit is instantiated in design_unit_tb as design_unit_inst, for example, then you can do this:
always @(design_unit_tb.design_unit_inst.int_reg) <--- int_reg is not input/output of design unit
- Hung