help!A question in DC synthesis

[LinXiaoling]

when including the IO PAD module ,the delay for some pad (e.g. reset_pad)is too large in critical setup timing path .Therefore,the violation is too large.can anyone help me?
Thanks!

 

[LinXiaoling]

can anybody give me a hand?

 

[ljxpjpjljx]

you can exclude this pad for STA~

 

[sree205]

like setting it as a false path ?

 

[LinXiaoling]

thanks very much!
but I will try and see if it will effect the backend design
and I hope there is another way to fix it.

 

[risccpu]

You need to confirm with the datasheet of IO PAD usage and set the according constraints in sdc.

 

[LinXiaoling]

do you mean that I just sythesis the core ,then change the SDC according to the IOPAD datasheet during placement process?