Floorplan modification and completion question

[design_oriented]

Hi Guys,

I have completed all the steps in the flow using Cadence tools till DRC/LVS for an IC and am seeing some LVS opens to VDD. I think this may be due to lesser power straps. My idea of solving this problem is as follows:

1. Open the floorplan in Encounter.
2. Delete all the VDD power straps.
3. Add some extra power straps.
4. Save the floorplan.
5. Proceed with the remaining steps like placement, cts, route etc.

Will this work or will it cause any problems with files/data?

Appreciate any help.

 

[ebuddy]

These steps will be fine, but it won't solve your LVS issue. Lesser power straps won't cause LVS issue in the first place. So the error comes from some where else.