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as you know, the technology parameter vary with the distance in the same wafer and even in the same the same die area. to average this variation we need to use what is called "transistor matching". to implement the matching between at least two transistors we need to subdivide the single transistor in to multiple transistors minimum of two (number of finger is 2), the higher finger number will give better matching but more layout complex. one have to care that also some of the physical properties of the transistors will change with the fingering even through you keep the same actual ratio, like the drain resistance and the parasitic capacitors.
I highly recommend you to read this book "The art of layout design" , read the CMOS chapter and you will get full idea about it.
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