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FFT VHDL code to be synthesizable in ASIC...

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Newbie level 6
Aug 6, 2005
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Dear All,
I want some help in obtaining VHDL code for fft to be synthesizable in ASIC, I saw XILNIX matlab system generator block for FFT but it was targeting FPGA but I'm targeting ASIC as I said, I'm using Leonardo tool for synthesis,
Please anybody helps..

Hi, have you ported any design from FPGA to ASIC earlier. Because if you have done this then you already have the answer.
If you have n't, then contact the FFT source code provider for the design code.
Then get the target libraries for the ASIC from the ASIC vendor and use it to map to the resources during synthesis using the ASIC synthesis tool.
FYI, I have done this Job in Synopsis DC. i.e. We had a design targeted in Xilinx FPGA which we parted to ASIC using synopsis DC.
Dear PINI_1
Thanks for reply, I need fixed point FFT, I don't know whether this code support the fixed point or not, I will take a look;
Thanks for your help

---------- Post added at 23:55 ---------- Previous post was at 23:52 ----------

Dear Iamventure,
Thanks for reply,
I think it is a good idea to port the design from FPGA to ASIC using synopsis DC, but unfortunately I don't have it at the moment , I'm using Leonardo synthesis tool,
any way I will look for that,
Thanks for help..

Dear Iamventure,
Can you explain further in more details how you ported your design using Synopsys DC? I mean if you have a VHDL netlist synthesiszed using Xilinx ISE, how can I import it in Synopsys DC?, and how can I make the mapping proces between Xilinx cells and ASIC cells using Synopsys DC?
Thanks for your reply...

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