If the designs are exactly the same then the leakage must be the same. You should check to see what library cells are used...sounds like one has a higher VT so you have lower leakage, but it is unusual for it to be the faster one.
Can you give the total number or percentage of high vt, low vt and regular vt cells used in both the iterations?
As low vt cells will have higher leakage and less dely while high vt cells will have low leakage and higher delay, pls examine the delay and leakage of different vtcells in your library.
You have the same circuits and your are testing them at differents clock speed with the same voltage. The leakage power is the power consumed by the circuit when it is no in switching phase. So the more the clock is quick the more the circuit have activity so the less static power is consumed.