Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Exception handling code in the OR1200

Status
Not open for further replies.

staraimm

Full Member level 2
Joined
Oct 21, 2006
Messages
134
Helped
5
Reputation
10
Reaction score
2
Trophy points
1,298
Activity points
2,178
Recently, I read the source code of OR1200. But I am a little confused
about the Exception part.

When a exception occurs, the correct execution PC value is found and
stored in the "epcr" register. And the "except_type" is set correctly.
Then in the next clock, all the instructions in the pipeline are
flushed. At the same time, the PC value is set to the exception
handling address according to the different exception types in the
or1200_genpc.v.

However, I don't understand why the FSM in the or1200_except.v almost
set the "extend_flush" signal for 5 clocks. It seems not necessary.

Does anybody know the answer?
 

staraimm

Full Member level 2
Joined
Oct 21, 2006
Messages
134
Helped
5
Reputation
10
Reaction score
2
Trophy points
1,298
Activity points
2,178
Nobody read the source code about the or1200?
 

staraimm

Full Member level 2
Joined
Oct 21, 2006
Messages
134
Helped
5
Reputation
10
Reaction score
2
Trophy points
1,298
Activity points
2,178
Did anybody read the source code of 0r1200?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top