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Differential Pair Transconductance!!!

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Re:
I don't prefer the usage of PMOS as input diff pair as it needs larger W/L to get the same gm that can be achieved by smaller NMOS
so it really limits your max operating frequency
best regards,
Rania


Hi Rania,
PMOS's 1/f noise performance is better than NMOS, and PMOS can be sited in NWEL, so PMOS as input diff pair input is more popular. However, as you say, PMOS has smaller gm for the same size. We can improve its bandwidth by increasing the current.

mouse
 

should be the same as one mos
 

The input bias voltage is too low to make the input different pair working in saturating zone.
 

i think you must make sure the pmos works on the edge of saturation.
and then, make the bias current bigger.

besides you may check out all ur pmos and nmos to see their op region
 

As already has been stated the diff pair is in triode. You have several options to fix this.

1. Tie the bodies of the diff pair off to the supply instead of to the source. The body effect increases the threshold value and your VDS will increase. This may not solve the issue though.

2. Add a PMOS level shifter to the diff pair.

3. Increase the bias current.

If you want to increase the gain you can also scale up the mirror devices of the diff pair from m=1 to m=?? whatever you want.

Also when you look at the gain it is easiest to close the loop like you are testing a op amp. Since you are cascoding the ouput, you don't have true rail to rail swing on your output. you can not put he comparator into unity game at some very low or very high voltage, like 100mV or something close to your rail. Your output can not pull down that low or pull that high. That is going to give you a very low db reading if you try to test the gain that way.
 

Looks like M9 is in triode region, need to adjust bias point.
Increase bias I can increase gm.
 

Maybe Vdas is too low, and the mosfet isn't work in the saturation region.
 

Hi,
I am a newer of analog circuit design. I have a questions about this circuit.
How does the bia part which consist of m14 m18 m17 m19 m13 m16 and m12 of this circuit work? How can them provide a constant current to bia the diff pair.

Thank you!
Best regards!
 

rania_hassan said:
I don't prefer the usage of PMOS as input diff pair as it needs larger W/L to get the same gm that can be achieved by smaller NMOS
so it really limits your max operating frequency
best regards,
Rania

reduced flicker noise and Better matching is to trade for Bandwidth for choosing either PMOS or Nmos input pair.

For medium frequency range and a common voltage sustainable by both type, Pmos input pair is THE choice because the current that you save in case of Nmos shall not compensate for a better matching or a better working circuit.
 

Some transistors are in triode, you have to put them in saturation before get gain make shura that DC operating point of all trasistors are stabilish in saturation.
The circuit that i use to bias the cascodes of the third stage of the amplifier are quiet different. I usually used two transistor with their gates connected and of then will be in triode and the other in saturation. The triode transistor had 3 times L than saturation trasistor to get the best headroom as possible to the output.
 

ac simulation does not have any sense if dc operation points are not set.
 

How is the output quiescent voltage set ?. As of now, the output leg looks like two different current sources(PMOS and NMOS) trying to force the output node to some value, that is the problem. Your biasing circuit is technically correct but it is not replicating the output leg exactly, the vds variations will reflect as difference in currents between PMOS and NMOS output transistors and the output node voltage cannot be fixed.

What is the specification for which you have chosen this structure ? Can you mention the specifications ?
 

Increase the Id of the differential pair.
 

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