Is this a homework?
No it is not. Please reply.
Can you please provide a design whose output will state the location of the first '1' from the LSB for an incoming parallel bit stream every clock?
There are 2-3 ways to code this. The obvious is a for loop from msb to lsb. This actually works when the synthesis tool understands and implements this in a good way. The fancy way uses "bitscan" with (x) & (-x). This expression returns a one-hot vector with the lowest 1 being the only bit set. The third method is manually generating the logic for a priority encoder.
There is also a priority encoder implementation that takes a 1-hot vector and does the and-or map-reduce with 10101010, 11001100, 11110000, etc...
Review this previous thread for an explanation. https://www.edaboard.com/showthread...cate-the-addresses-of-1-s-in-std_logic_vectorWhat is x and what is -x?
Code:for (i=0; i<WIDTH, i=i+1) begin if (input[i]) begin position = i; break; end end
Some synthesis tools have difficulties to implement non-arithmetic problems like priority encoder optimally following a behavioral description, but they are always able to implement it correctly.
Will not in non synthesizable due to this break inside the for loop as this break is stopping the loop to continue?
You stated that some synthesis tools have difficulty to implement non-arithmetic problems. You also wrote that they, the synthesis tools, are always to implement non-arithmetic problems correctly? How both can be valid? Did you intend to state something else by your above quoted statement then?