Design Compiler & RTL Compiler

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rtl compiler design compiler

actually i'm comfortable with DC. now i have to use RTL compiler.

what r the issues i need to take care?

anybody expalin the differences between synopsys DC & cadence RTL Compiler
interms of the synthesis process, design handling, constrainnig, timing etc..
 

dc rtl compiler

basic RC do synthesis is interms of GLOBALLY.
Dc do optimization in the timing path.
but RC first take timing (cpt) do optimization . then none critical path RC do area,power optimization.
so it can achieve tradeoff between area,time ,speed
 
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