Crystal oscillator frequency Vs Amplitude

[captab]

If I use a pierce crystal oscillator with common source amplifier and I regulate the current source(AGC) to control the amplitude of oscillation, will I get same or different frequencies for different amplitudes (set through AGC).For all the amplitudes set, the crystal parameters remain the same. The crystal is operating in parallel resonance, so the load capacitors also remain the same for all the amplitudes. Also will the frequency I get by regulating the amplitude will be the same if the amplitude is not controlled (fixed current source).I am going through the paper by Vittoz, but not able to catch the point when the paper says frequency stability due to nonlinearities in the circuit.
Experts in the field please advise.

 

[FvM]

There may be a frequency change of a few ppm caused by non-linear transistor capacitances.

 

[captab]

Thanks.Now suppose I run the AGC across process (Nominal,Slow,Fast) and the ampltiude controlled is same for all the process, do you expect the magnitude of current that current source provides will be the same across process or it can differ.If possible, can you please provide more explantion of this.

 

[jiripolivka]

For the best results, a crystal oscillator should be followed with a buffer amplifier to reduce load effects. Most oscillators are characterized by load-pull effect due to load mismatch and variation.

 

[saro_k_82]

Due to the non-linearity of the active device characteristic, harmonics of the fundamental are created which are fed back and gets mixed to create IMP that introduce phase distortion at the oscillation frequency (say 2*wo-wo=wo falls at the original fundamental at altered phase) that results in frequency shift. Frequency stability problems like these dont get diluted by buffer stages (though they prevent phase distortion from transient load changes or non-linear load capacitances).
Vittoz cites this as one of the major reasons to go for amplitude regulation. With amplitude regulation these effects can be reduced greatly.
To ensure that this happens, you can run PSS on the oscillator without AGC (allow harmonics->near square wave output) and with AGC (sine-wave output) and compare their phase noise performance

 

[captab]

Thanks. You mean to say the fundamental ftrequency will change due to nonlinearities or are you talking about jitter.If the fundamental frequency is getting changed, then as I raised the question to start with, will the frequency vary Vs ampltiude and also without any amplitude control. Also how can I predict the ampltiude of oscillation for a given bias current.

 

[yuvan]

Due to the non-linearity of the active device characteristic, harmonics of the fundamental are created which are fed back and gets mixed to create IMP that introduce phase distortion at the oscillation frequency (say 2*wo-wo=wo falls at the original fundamental at altered phase) that results in frequency shift. Frequency stability problems like these dont get diluted by buffer stages (though they prevent phase distortion from transient load changes or non-linear load capacitances).

But won't the harmonics be filtered out the by the crystal which in itself acts like a narrow band filter?

 

[saro_k_82]

The change in the fundamental frequency may be too small to be observable, but the resulting phase noise would be. Note that the open loop circuit the phase noise would be higher in addition to the swing being dependent on supply, load and temperature resulting in greater phase noise during use (lower frequency stability)
The amplitude limited scheme basically aims to limit the amplitude through "feedback" rather than through device non-linearities as it happens in a open loop circuit.
I dont have a closed form expression for the resulting amplitude, but I dont think it is too hard to predict it to a first degree. The filtered VGS should settle to provide the "average current" through the active device that was present when there were no oscillation.

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But won't the harmonics be filtered out the by the crystal which in itself acts like a narrow band filter?

To a great degree, YES. But the filtering wont be perfect due to the bypass capacitance of the package mainly and also due to the other modes that exist in the crystal.

 

[captab]

Thanks. Is there a way, we can predict the ampltiude at drain since I am planning to regulate the drain amplitude through AGC.I mean even if we evaluate the Gate waveform, how can we say what will be the amplitude at drain for perticular gat waveform.Is this all have to be done through simulations?

 

[saro_k_82]

The amplitude can be predicted and according to Vittoz,

where IB0 is the 0th order modified Bessel function, Ut is the thermal voltage, K is the factor by which the dVGS transistor is stronger than the amplifying transistor. V is the amplitude of oscillation and I is the settled bias current.

 

[captab]

I am simulating a crystal for an amplitude target of say 300mV. For crystal parasitic cap of Cp and load Cap of say Cload, I require say Ix amount of current. Now for same Cp, I have made Cload as 1.5*Cload.If I look at the negative resistance number, I get a larger negative number, but for same amplitude of 300mV, I see that Ix has increased to say 1.5*Ix.Is this expected?

 

[yuvan]

Hi, With increasing Cload, we should expect the negative impedance to go down by ~Power of 2 (not including cp). But since you are having a amplitude control circuitry, to maintain same ampl, the gm should be increasing by ~ 2 times, since the gain would be the same in both cases, but in fact all the analysis excludes rds effect, so I would expect the current to go up by more than 2 times. So, do you have the circuit used for ampl control? and also what about (vgs-vt) in both cases?

 

[captab]

Thanks. I do see your point, but here your negative resistance calculations are done without taking into account the impact of crystal parasitic cap.With that, I see that negative resistance increases when load cap is increased for my frequency of interest.But from amplitude control perspective I see that current has increased.

 

[yuvan]

If you consider the cp to be sitting parallel to crystal then it presents itself as 2*cp sitting in parallel to c1 & c2; so I would still except it to degrade. How much is the negative impedance increasing by? And as such if your negative impedance is increasing then you should except the current to be decreasing in ampl control else it means you are more than gmopt (as specified by root locus plot of negative impedance WRT to gm & inefficient region of operation).

 

[captab]

Thanks. As you said, the negative resistance plot is a bidirectional plot meaning it has one max value and if gm increases more, the negative resistance value decreases. Now say I have designed the crystal with current I1 for which I get 0.8*MaxNegative resistance and then for another current I2(>I1) and I again get 0.8*MaxNegative resistance due to bidirectional plot. Now in which case I will get maximum large signal amplitude. Also is the amplitude Vs current plot for crystal is monotonic unlike its small signal gm plot which is bidirectional?

 

[yuvan]

I would except larger amplitude for the same negative impedance number with lower current considering rds effect. And concerning the large signal operation, I think the amplitude is controlled by the small signal gain as it is not a non-linear model.

 

[captab]

For now if we neglect the effect of Rds, will the ampltiude Vs Current graph be monotonic or it will also be bidirectional as in the case of negative resistance Vs gm

 

[yuvan]

I guess you will be having non-monotonic behavior.

 

[Kevin Aylward]

Due to the non-linearity of the active device characteristic, harmonics of the fundamental are created which are fed back and gets mixed to create IMP that introduce phase distortion at the oscillation frequency (say 2*wo-wo=wo falls at the original fundamental at altered phase) that results in frequency shift. Frequency stability problems like these dont get diluted by buffer stages (though they prevent phase distortion from transient load changes or non-linear load capacitances).
Vittoz cites this as one of the major reasons to go for amplitude regulation. With amplitude regulation these effects can be reduced greatly.
To ensure that this happens, you can run PSS on the oscillator without AGC (allow harmonics->near square wave output) and with AGC (sine-wave output) and compare their phase noise performance

You would think so, but in practice the AGC loop usually adds more phase noise than which can be achieved by using the simplest one transistor oscillator possible.

 

[yuvan]

Hi kevin,
The non-linearity of the active device will be reduced, at the final settled amplitude (in combination with AGC), at which we will be having the closed loop gain to be close to unity; If this happens to be true then what do you feel will introduce the additional phase noise; & Yes, we will have poorer phase noise performance when we operate the oscillator itself with such low currents. I will anyway go through your phase noise tutorial in ur blog.