correct syntax to write the port_pin_list needed

[wakki1187]

PrimeTime port pin list

Could anyone please tell me the correct syntax to write the port_pin_list?

What is it actually, anyway?
I just could not understand it even though I have read the tutorial.

Please help me...

 

[ljxpjpjljx]

Re: PrimeTime port pin list

you can read the PT example and get some basic idea for the setting!

 

[childs]

Re: PrimeTime port pin list

Is this what you are asking about?

For example: syntax for set_input_delay is
set_input_delay <delay> <port_pin_list>

You can do it by either:
>set_input_delay 0 {U1/a U2/a}
>set_input_delay 0 "U1/a U2/a"
>set_input_delay 0 [get_pins "U1/a U2/a"]
and so on methods....

 

[wakki1187]

PrimeTime port pin list

ljxpjpjljx:
I didn't find any PT example showing how to write the pin list like the one that childs showed. That's why I asked here..

childs:
Oh.. So that's how it is..
Thank you for responding..

But what does the a in U1/a means?
Does it mean the input?

If I have 30 primary inputs, do I have to list down all the 30 inputs in that pin list?

 

[childs]

Re: PrimeTime port pin list

U1/a is a pin name, for your case, maybe you can try with:
>set_input_delay [all_inputs]


p.s: I am also newbie in PT, hope any advance user can provide further correction or advices.

 

[cie40]

PrimeTime port pin list

For getting all input ports : all_inputs
all output ports : all_outputs
all ports : get_ports "*"

 

[wakki1187]

PrimeTime port pin list

Hye all.. Thank you for your answers.. They helped me a lot..

but I now have problems with operating conditions.
Does anybody knows what analysis type is suitable to be used for a combinational circuit?
Is it single @ bc_wc?