Correct sequence for layout drawing

[dewabantura]

layers sequence

Hi there friends and fellow professionals!

I have a question here. What is the correct sequence to draw a layout of NMOS using NPLUS, DIFF, POLY, CONTACT, METAL1, METAL2, VIA?

Hope all can help!

Thanks for your time and answers!

 

[aomeen]

nactive region

Generally speaking, If you are using a kit you will find a standard cell for your transistor ready to be used..

If you are making own layout, then here are the steps:

1. First draw the well, for NMOS on single well process then no well exists. If PMOS use NWELL, if NMOS on triple well technology use PWELL

2. Then you need to define the OD "Oxide definision", if you can find this layer make it in place where your transistor will be put. if you cant find it go on.

3. Now Define the diffusion for the Source and drain, the width of this region is W of transistor, and the length is technology dependent.

4. Add the poly to make the gate, the width of the poly region is L of the transistor

5. Add the Diff/M1 contact and M1 to connect S and D areas.

6. Finally if using NWELL and PWELL you need define well contact.

7. Vias are only needed for higher metal layers

Good Luck

 

[dewabantura]

sequence layout drawing

Thanks aomeen for your response.

But how about NPLUS? do we need to add the NPLUS layer? When do we add NPLUS?

 

[swagata]

seq drawing * arabic

Query:
what about this sequence?-

1. nactive region or NPLUS
2.POLY
3.Contacts for Source & Drain(on nactive region)
4.Defining substrate area p-type
5. Creating contact for substrate
6.surrounding active areas with Select rectangles
7.Adding Metal1 layer above contacts
8. Giving paths

 

[deh_fuhrer]

Query:
what about this sequence?-

1. nactive region or NPLUS
2.POLY
3.Contacts for Source & Drain(on nactive region)
4.Defining substrate area p-type
5. Creating contact for substrate
6.surrounding active areas with Select rectangles
7.Adding Metal1 layer above contacts
8. Giving paths

1. NWELL..
2. POLY
3. nactive region or NPLUS
4. Contacts for Source & Drain(on nactive region)
...
rest can be same as swagata told...

 

[aomeen]

Thanks aomeen for your response.

But how about NPLUS? do we need to add the NPLUS layer? When do we add NPLUS?

you are welcome,
By diffusion I mean NPLUS or PPLUS, according to the transistor type..

 

[swagata]

actually when you add the n-select or p-select (which are logical layers),you are defining the nactive or pactive region as the NPLUS or PPLUS.