I decide to connect an EPROM (M27C256B) to Xilinx Spartan II FPGA.
I want to know how EPROM work when a byte read from it.
As you know in most EPROMs we have CE and OE pins. (these pins are LOW enable)
What happens if i connect these two pins permanently to GND and change only
address inputs to read data from EPROM ?
The address inputs and data outputs of EPROM connect only to FPGA.
Can EPROM operate correctly if i use this configuration ?
If EPROM's CE and OE pins are edge-triggered, it's not possible to read data continuosly. If they are level triggered, it's possible to read data by changing address inputs.